# MIPS | CMPUT 229 (Winter 2017) – Homewor

CMPUT 229 (Winter 2017) – Homework #1 Instructor: Karim Ali
Question 1: (5 points)
Consider that a processor architecture ToyProc, which was initially designed as big- endian, is changed to use little-endian byte ordering. Assuming the subset of the MIPS ISA that you are familiar with, and assuming a memory with a word-level interface, give examples of instructions whose operations will be affected by such a change in endianness.
Question 2: (5 points)
Write the C code that best corresponds to the following MIPS assembly code. Assume that registers \$s1, \$s2, and \$s3 store the values of 32-bit integers x, y, and z.
L1: beq \$s1, \$zero, L2
L2:
Question 3: (15 points)
For this question, assume that:
• p, q, i, j are 32-bit integers whose values are stored in \$s0, \$s1, \$s2, and \$s3, respectively.
• A and B are arrays of integers.
• r is a pointer declared as int *r.
• r, the base address of array A, and the base address of array B are all in the stack frame of the current function, as shown below
For each of the C statements below, give the translation into MIPS. Do not use pseudo- instructions in your code. Clearly label which MIPS instructions are for which statement.
a. (5 points) q = *r
b. (5 points) B[i] = A[j]
c. (5 points) p = q + A[B[j]] Question 4: (15 points)
Write the assembly code to implement the following C function:
int selector(int array[], int i) {
return array[array[i]];
}

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